Nano Archive

Downscaling of self-aligned, all-printed polymer thin-film transistors

Noh, Yong-Young and Zhao, Ni and Caironi, Mario and Sirringhaus, Henning (2007) Downscaling of self-aligned, all-printed polymer thin-film transistors. NATURE NANOTECHNOLOGY, 2 (12). pp. 784-789.

Full text is not hosted in this archive but may be available via the Official URL, or by requesting a copy from the corresponding author.

Official URL:


Printing is an emerging approach for low-cost, large-area manufacturing of electronic circuits, but it has the disadvantages of poor resolution, large overlap capacitances, and film thickness limitations, resulting in slow circuit speeds and high operating voltages. Here, we demonstrate a self-aligned printing approach that allows downscaling of printed organic thin-film transistors to channel lengths of 100-400 nm. The use of a crosslinkable polymer gate dielectric with 30-50 nm thickness ensures that basic scaling requirements are fulfilled and that operating voltages are below 5 V. The device architecture minimizes contact resistance effects, enabling clean scaling of transistor current with channel length. A self-aligned gate configuration minimizes parasitic overlap capacitance to values as low as 0.2-0.6 pF mm(-1), and allows transition frequencies of f(T) = 1.6 MHz to be reached. Our self-aligned process provides a way to improve the performance of printed organic transistor circuits by downscaling, while remaining compatible with the requirements of large-area, flexible electronics manufacturing.

Item Type:Article
Subjects:Material Science > Nanofabrication processes and tools
Technology > Manufacturing processes for nanotechnology
Engineering > Nanotechnology applications in ICT
ID Code:473
Deposited On:04 Dec 2008 15:59
Last Modified:04 Dec 2008 15:59

Repository Staff Only: item control page