Nano Archive

Vertical wrap-gated nanowire transistors

Bryllert, Tomas and Wernersson, LE and Lowgren, T and Samuelson, L (2006) Vertical wrap-gated nanowire transistors. NANOTECHNOLOGY, 17 (11). S227-S230.

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Official URL: http://dx.doi.org/10.1088/0957-4484/17/11/S01

Abstract

We present a process for fabricating a field-effect transistor based on vertically standing InAs nanowires and demonstrate initial device characteristics. The wires are grown by chemical beam epitaxy at lithographically defined locations. Wrap gates are formed around the base of the wires through a number of deposition and etch steps. The fabrication is based on standard III - V processing and includes no random elements or single nanowire manipulation.

Item Type:Article
Subjects:Material Science > Nanofabrication processes and tools
Physical Science > Nano objects
Physical Science > Nanoelectronics
ID Code:3698
Deposited By:Farnush Anwar
Deposited On:22 Jan 2009 14:46
Last Modified:12 Feb 2009 10:07

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