Nano Archive

Practical Technique for Reduced-Order Modeling of RLCK Circuits Based on Ktylov Space Methods.

Khapaev, M. M. and Potyagalova , A. S. and Soltan, I. E. and Tkachev , D. F. (2006) Practical Technique for Reduced-Order Modeling of RLCK Circuits Based on Ktylov Space Methods. Journal of NANO and MICROSYSTEM TECHNIQUE, 6 (6). pp. 44-47.

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Official URL: http://www.microsystems.ru/

Abstract

In this paper, we present an implementation of model order reduction (MOR) for resistance-inductance-capacitance (RLCK) network. The algorithm generates guaranteed-passive models using numerically stable and efficient Krylov-subspace iterations. A result of reduction algorithm is a small network whose port behavior is similar to that of large RLCK-network. Further it is shown how to reduce a model via congruence transformations of matrix pencil. This paper presents some results of comparison simulation foe full and reduced networks.

Item Type:Article
ID Code:2020
Deposited By:Prof. Alexey Ivanov
Deposited On:19 Dec 2008 13:21
Last Modified:20 Mar 2009 08:58

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