Nano Archive

Vertical wrap-gated nanowire transistors

Bryllert, Tomas and Wernersson, Lars-Erik and Lowgren, Truls and Samuelson, Lars (2006) Vertical wrap-gated nanowire transistors. Nanotechnology, 17 (11). S227-S230. ISSN 09574484

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Official URL: http://dx.doi.org/10.1088/0957-4484/17/11/S01

Abstract

We present a process for fabricating a field-effect transistor based on vertically standing InAs nanowires and demonstrate initial device characteristics. The wires are grown by chemical beam epitaxy at lithographically defined locations. Wrap gates are formed around the base of the wires through a number of deposition and etch steps. The fabrication is based on standard III–V processing and includes no random elements or single nanowire manipulation.

Item Type:Article
Subjects:Physical Science > Nanoelectronics
ID Code:184
Deposited By:Lesley Tobin
Deposited On:13 Nov 2008 12:25
Last Modified:27 Jan 2009 16:38

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