Alekminsky, S.Yu. and Nepomnvashy, O.V. (2010) Problems of Project Verification During the trough Designing of Computer Systems on Chip. Journal of NANO and MICROSYSTEM TECHNIQUE (9).
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Official URL: http:// www.microsystems.ru
Abstract
The article deals with modern problems of functional and system verification of very large scale integrated (VLSI) circuits and systems on a chip in particular. There is a review of existing methods of verification and propose ways to solve the aforesaid problems. Keywords: functional verification, system verification, CAD, VLSI, system on chip
| Item Type: | Article |
|---|---|
| Additional Information: | Full text is in Russian |
| ID Code: | 10308 |
| Deposited By: | Prof. Alexey Ivanov |
| Deposited On: | 08 Dec 2010 23:41 |
| Last Modified: | 09 Dec 2010 09:29 |
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